Skills Overview

Language: VHDL

Software: Quartus

Hardware: DE1 Board, VGA

Core Concepts: VGA Timing Generation, Horizontal/Vertical Sync Pulses, Pixel Coordinate Tracking, Modular Design, Behavioral & Structural Modeling, Digital Simulation & Verification, Hardware Interfacing 

Technical Overview

Behavioral & Structural Modeling: Combined process-based behavioral descriptions with structural connections to implement a complete VGA interface.

Component Design & Implementation:

• sync.vhd (VGA Synchronization Generator): Generates horizontal sync (HSYNC) and vertical sync (VSYNC) signals using counters to match VGA timing standards (e.g., 640x480 @ 60 Hz). Maintains timing for active video, front porch, sync pulse, and back porch intervals.

• subR.vhd (Pixel/Color Subroutine): Defines pixel color logic, typically using combinational processes to set RGB outputs based on screen coordinates. Enables drawing patterns, shapes, or test images. (square in our case)

• vga.vhd (Top-Level VGA Controller): Integrates the synchronization generator and subroutine to produce a full VGA output. Routes RGB color data and sync pulses to the monitor in real time.

Simulation & Verification:
Simulated in ModelSim to confirm correct HSYNC/VSYNC pulse widths and active display region timing. Verified pixel generation by checking RGB output waveforms and ensuring proper frame refresh cycles.

Key Concepts on Display

Squares on Screen