The purpose of this project was to design and implement a 4-bit Arithmetic Logic Unit capable of performing both addition and subtraction. The system was designed to handle signed numbers using the 2's complement method for subtraction and to visually represent the results on a seven-segment display. A key feature is the ALU's ability to correctly display both positive and negative results and to signal if an operation has caused an arithmetic overflow.
*This was worked on as part of Group Project*
Software: Quartus Prime, ModelSim
Hardware: DE1-SoC Board
Core Concepts: Arithmetic Logic Units (ALUs), 2's Complement, Signed Arithmetic, Overflow Detection, Modular Design.
Signed Arithmetic: The ALU performs addition and subtraction on 4-bit signed numbers. Subtraction is achieved by converting the subtrahend to its 2's complement form (inverting each bit and adding one) before the addition.
Modular Design: The core of the ALU is a 4-bit adder, which was built by first designing a 1-bit full adder and then connecting four instances together structurally.
Opcode Control: A control input allows the user to select one of four distinct operations: Add X to Y, Add 1 to X, Add 0 to X, or Subtract Y from X.
Negative & Overflow Handling: The design incorporates a sign bit to trigger a negative symbol on the display for negative results. It also includes dedicated logic to signal an overflow condition with an LED if the result exceeds the 4-bit signed range.
Low Level Mux: Op Code Selection
Top Level Mux: Op Code Selection
1 Bit Adder
Top Level Add
Add with Subtract Functionailty
Full Overview
This was the only real logic to be worked out. Everything comes from this simple K-Map. Two's Compliment is just known so was not worked out for showcasing subtraction logic.
A primary challenge during this project was correctly distinguishing between the binary representation of a valid negative number and a true arithmetic overflow. Resolving this issue led to a deeper understanding of the underlying logic of 2's complement arithmetic. The result was a functional and reliable circuit that accurately performs addition and subtraction while correctly accounting for edge cases like negative results and overflows.
(Additionally, such components such as the logic surrounding the sign bit display is not showcased on this page due to it being simple check of wether subtraction was selected and if no overflow was detected, is both happen a negative number would have occured that resulted in specifically a negative number)